A thin-film transistor (TFT) is one kind of a field effect transistor (FET). A TFT is a three-terminal element that has as the basic structure a gate terminal, a source terminal, and a drain terminal, in which a semiconductor thin film that is formed on a substrate is used as a channel layer where electrons or holes move, and is an active element having a function of applying voltage to the gate terminal, controlling the current that flows in the channel layer, and switching the current between the source terminal and drain terminal. Currently, polycrystalline silicon thin film or amorphous silicon thin film is widely used as the channel layer of a TFT.
Of these, amorphous silicon thin film can be formed as a uniform film on a large-area 10th generation glass substrate, so is widely used as a channel layer of a TFT for a liquid-crystal panel. However, the mobility of carrier electrons (carrier mobility) is a low 1 cm2V−1sec−1 or less, so application in a high-definition panel TFT is difficult. In other words, as the definition of liquid crystals becomes higher, there is a need for high-speed driving of thin-film transistors, and in order to achieve this kind of high-speed driving of thin-film transistors, it is necessary to use semiconductor thin film that displays a carrier mobility that is higher than the 1 cm2V−1sec−1 carrier mobility of amorphous silicon thin film.
On the other hand, polycrystalline silicon thin film displays a high carrier mobility of about 100 cm2V−1sec−1, so can be said to have adequate characteristics as a channel layer material for a thin-film transistor for a high-definition panel. However, in a polycrystalline silicon thin film, the carrier mobility decreases at the crystal grain boundaries, so there is a problem in that there is a lack of uniformity in the substrate surface, and variations in the thin-film transistor characteristics occur. Moreover, polycrystalline silicon thin film is obtain by forming an amorphous silicon film with a substrate temperature of 300° C. or less, and then crystallizing that film by an annealing process, however, when doing this, the annealing process must be performed using a special method such as excimer laser annealing, so there is a problem in that the cost becomes high. In addition, the size of the glass substrate that can be used is limited to about a 5th generation glass substrate, so there is a limit to cost reduction, and product development is also limited. Therefore, currently there is a need for a material that can be used as the material for a channel layer of a thin-film transistor that has the excellent characteristics of both an amorphous silicon thin film and a polycrystalline silicon thin film, and that can be obtained at low cost.
For example, JP 2010219538 (A) discloses a transparent amorphous oxide semiconductor thin film that is formed using a vapor phase film deposition method and includes the elements of In, Ga, Zn and O. This transparent amorphous oxide thin film has a composition of InGaO3(ZnO)m when crystallized (where m is a natural number less than 6), and without adding impurity ions, it is possible to achieve a carrier mobility that is greater than 1 cm2V−1sec−1, and a carrier density that is 1×1016 cm−3 or less.
However, the amorphous oxide semiconductor thin film has problems in that it is inherently easy for oxygen deficiencies to be generated, and due to external factors such as heat, the behavior of the electrons is not always stable, which causes the operation of the thin-film transistor to become unstable. Moreover, when a negative bias is continuously applied to a thin-film transistor under visible-light irradiation, there is also a problem in that the threshold voltage will shift to the negative side, and a light negative bias deterioration phenomenon will occur.
Therefore, in recent years, instead of amorphous oxide semiconductor thin film, research for using a crystalline oxide semiconductor thin film as the channel layer of a thin-film transistor is advancing.
For example, WO 2010032422 (A1) discloses an oxide semiconductor thin film having bixbyite-structured In2O3 phase in which gallium is solid-solved in indium oxide, with the Ga/(In+Ga) atomic ratio being 0.001 to 0.12, and the content of indium and gallium with respect to all of the metal atoms being 80 atomic % or greater. Moreover, JP 2011146571 (A) discloses an oxide semiconductor thin film that includes bixbyite-structured indium oxide phase as the crystal structure, and that has a Ga/(In+Ga) atomic ratio of 0.10 to 0.15.
In the technology disclosed in these documents, after an amorphous oxide thin film has been formed using a sputtering method with an oxide sintered body that includes bixbyite-structured In2O3 single phase as the target, a crystalline oxide semiconductor thin film is obtained by performing an annealing process on the amorphous oxide thin film. Therefore, in the case of the oxide semiconductor thin film disclosed in these documents, the problem described above that is caused by an amorphous oxide semiconductor thin film does not occur. Moreover, the crystalline oxide semiconductor thin film disclosed in these documents achieves a high carrier mobility of 40 cm2V−1sec−1 or greater.
In WO 2010032422 (A1) and JP 2011146571 (A), first an amorphous film is formed, and after that a crystalline oxide semiconductor thin film is obtained by performing an annealing process on the amorphous oxide thin film. Typically, in the manufacturing process of a thin-film transistor, after forming an amorphous film, a patterning process to obtain a desired channel layer shape is performed, so wet etching using a weak acid such as an aqueous solution that includes oxalic acid or hydrochloric acid is performed. However, in WO 2010032422 (A1) and JP 2011146572 (A), an oxide sintered body that essentially has only bixbyite structure is used as a sputtering target that will be used in sputtering film formation, so problems occur in that the crystallization temperature of the amorphous film that is formed becomes low, minute crystals are already generated in the stage after film formation, and in the etching process residue occurs, or crystallization partially occurs and etching is not possible. In other words, when applying the oxide semiconductor thin film of WO 2010032422 (A1) and JP 2011146571 (A) to the channel layer of a thin-film transistor, it is difficult to form a desired pattern by using a wet etching method that uses photolithography technology or the like. Therefore, for example, in the examples in WO 2010032422 (A1) and JP 2011146571 (A), a channel layer is formed by using a simple method that uses a metal mask.
In regard to this, JP 2012253315 (A) discloses a thin-film transistor that uses an oxide semiconductor thin film that has a Ga/(In+Ga) atomic ratio of 0.01 to 0.09 as the channel layer. In the case of the technology disclosed in this document, this oxide semiconductor thin film is formed by sputtering film formation in a gaseous mixture (sputtering gas) atmosphere that includes water molecules. In this kind of method, a highly amorphous oxide semiconductor thin film in which oxide crystals are scattered is obtained due to the existence of H+ or OH− that separates from the water molecules.
However, according to WO 2010035716 (A1), when film is formed by using a sputtering method in an atmosphere in which water molecules exist, there is a possibility that particles will be included in the oxide semiconductor thin film that is obtained.
Moreover, “In2O3 High Mobility Transparent Conductive Film”, T. Koita et al., Journal of the Surface Science Society of Japan, Volume 29, No. 1, 2008; pg. 18 to 24, reports that in oxide semiconductor thin film that is obtained by the method described above, H+ remains in the crystals after the annealing process. It has been pointed out from both theoretical calculation (“Effect of hydrogen incorporation on the negative bias illumination stress instability in amorphous In—Ga—Zn—O thin-film-transistors”, K. Noh et al., J. Appl. Physics 113 (2013) 063712) and testing (“Hydrogen passivation of electron trap in amorphous In—Ga—Zn—O thin-film transistors”, T. Hanyu et at, Appl. Physics Letter 103 (2013) 202114) that the H+ that remains in the this kind of thin film causes a decrease in the film quality of the oxide semiconductor thin film, or becomes an unnecessary carrier source and may bring about an increase in the carrier density.
On the other hand, the inventors of the present invention proposed in WO 2009008297 (A1) using an oxide sintered body as a target in which indium and gallium are included as oxides, bixbyite-structured In2O3 phase is the main crystal phase, and in that, β-Ga2O3-structured GaInO3 phase, or GaInO3 phase and (Ga, In)2O3 phase is finely dispersed as crystal particles having an average particle size of 5 μm or less, and the gallium content is such that the Ga/(In+Ga) atomic ratio is 10 atomic % or more and 35 atomic % or less. When film is formed by a sputtering method or an ion-plating method using this target, a highly amorphous oxide thin film is obtained without adding water molecules to the atmosphere gas, so good etching characteristics are expected. However, the oxide sintered body disclosed in WO 2009008297 (A1) is not just bixbyite-structured In2O3 phase, but also includes other composite oxide phases, so it is unlikely but still unclear whether the crystalline oxide thin film that is obtained from this will only be In2O3 single phase.
In addition, JP H07182924 (A) discloses that when the gallium content is such that the Ga/(In+Ga) atomic ratio is near 50 atomic %, a GaInO3 transparent conductive thin film will be obtained from a sintered body having β gallium oxide crystal structured GaInO3 single phase that resembles one Ga2O3 shape.
In other words, JP 2012253372 (A) strongly suggests that from the oxide sintered body disclosed in JP H07182924 (A), a crystalline oxide thin film that includes β-Ga2O3-structured GaInO3 phase will be obtained instead of a crystalline oxide thin film that includes bixbyite-structured In2O3 single phase that is expected to have a high carrier mobility.